92c17dede2
1. Z-probing is now done in two stages: a fast stage at the configured home feed rate until within 10% of the target value, then a slow stage at 20% of that feed rate. 2. Provisional support for ultrasonic Z-probe. 3. Added calibration temperature and height temperature coefficient to Z probe parameters. 4. Z-probe parameters and Z-probe type are now saved to flash memory so that they survive power-off and reset cycles. Separate parameters are retained for IR and ultrasonic probes in case both are fitted. 5. Fixed issue with doing slow Z-moves immediately after Z-homing or probing.
139 lines
4.6 KiB
C
139 lines
4.6 KiB
C
/**
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* \file
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*
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* \brief Embedded Flash Controller (EFC) driver for SAM.
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*
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* Copyright (c) 2011-2012 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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#ifndef EFC_H_INCLUDED
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#define EFC_H_INCLUDED
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#include <Arduino.h>
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#include <inttypes.h>
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#define SAM3XA
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#define RAMFUNC __attribute__ ((section(".ramfunc")))
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/// @cond 0
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/**INDENT-OFF**/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**INDENT-ON**/
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/// @endcond
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/*! \name EFC return codes */
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//! @{
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typedef enum efc_rc {
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EFC_RC_OK = 0, //!< Operation OK
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EFC_RC_YES = 0, //!< Yes
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EFC_RC_NO = 1, //!< No
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EFC_RC_ERROR = 1, //!< General error
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EFC_RC_INVALID, //!< Invalid argument input
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EFC_RC_NOT_SUPPORT = 0xFFFFFFFF //!< Operation is not supported
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} efc_rc_t;
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//! @}
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/*! \name EFC command */
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//! @{
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#define EFC_FCMD_GETD 0x00 //!< Get Flash Descriptor
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#define EFC_FCMD_WP 0x01 //!< Write page
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#define EFC_FCMD_WPL 0x02 //!< Write page and lock
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#define EFC_FCMD_EWP 0x03 //!< Erase page and write page
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#define EFC_FCMD_EWPL 0x04 //!< Erase page and write page then lock
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#define EFC_FCMD_EA 0x05 //!< Erase all
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#if (SAM3SD8)
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#define EFC_FCMD_EPL 0x06 //!< Erase plane
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#endif
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#if (SAM4S || SAM4E)
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#define EFC_FCMD_EPA 0x07 //!< Erase pages
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#endif
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#define EFC_FCMD_SLB 0x08 //!< Set Lock Bit
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#define EFC_FCMD_CLB 0x09 //!< Clear Lock Bit
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#define EFC_FCMD_GLB 0x0A //!< Get Lock Bit
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#define EFC_FCMD_SGPB 0x0B //!< Set GPNVM Bit
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#define EFC_FCMD_CGPB 0x0C //!< Clear GPNVM Bit
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#define EFC_FCMD_GGPB 0x0D //!< Get GPNVM Bit
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#define EFC_FCMD_STUI 0x0E //!< Start unique ID
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#define EFC_FCMD_SPUI 0x0F //!< Stop unique ID
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#if (!SAM3U && !SAM3SD8 && !SAM3S8)
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#define EFC_FCMD_GCALB 0x10 //!< Get CALIB Bit
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#endif
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#if (SAM4S || SAM4E)
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#define EFC_FCMD_ES 0x11 //!< Erase sector
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#define EFC_FCMD_WUS 0x12 //!< Write user signature
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#define EFC_FCMD_EUS 0x13 //!< Erase user signature
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#define EFC_FCMD_STUS 0x14 //!< Start read user signature
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#define EFC_FCMD_SPUS 0x15 //!< Stop read user signature
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#endif
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//! @}
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/*! The IAP function entry address */
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#define CHIP_FLASH_IAP_ADDRESS (IROM_ADDR + 8)
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/*! \name EFC access mode */
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//! @{
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#define EFC_ACCESS_MODE_128 0
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#define EFC_ACCESS_MODE_64 EEFC_FMR_FAM
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//! @}
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uint32_t efc_init(Efc *p_efc, uint32_t ul_access_mode, uint32_t ul_fws);
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void efc_enable_frdy_interrupt(Efc *p_efc);
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void efc_disable_frdy_interrupt(Efc *p_efc);
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void efc_set_flash_access_mode(Efc *p_efc, uint32_t ul_mode);
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uint32_t efc_get_flash_access_mode(Efc *p_efc);
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void efc_set_wait_state(Efc *p_efc, uint32_t ul_fws);
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uint32_t efc_get_wait_state(Efc *p_efc);
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uint32_t efc_perform_command(Efc *p_efc, uint32_t ul_command,
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uint32_t ul_argument);
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uint32_t efc_get_status(Efc *p_efc);
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uint32_t efc_get_result(Efc *p_efc);
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uint32_t efc_perform_read_sequence(Efc *p_efc,
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uint32_t ul_cmd_st, uint32_t ul_cmd_sp,
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uint32_t *p_ul_buf, uint32_t ul_size);
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/// @cond 0
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/**INDENT-OFF**/
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#ifdef __cplusplus
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}
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#endif
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/**INDENT-ON**/
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/// @endcond
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#endif /* EFC_H_INCLUDED */
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